JPS625722Y2 - - Google Patents

Info

Publication number
JPS625722Y2
JPS625722Y2 JP9638182U JP9638182U JPS625722Y2 JP S625722 Y2 JPS625722 Y2 JP S625722Y2 JP 9638182 U JP9638182 U JP 9638182U JP 9638182 U JP9638182 U JP 9638182U JP S625722 Y2 JPS625722 Y2 JP S625722Y2
Authority
JP
Japan
Prior art keywords
signal
phase
circuit
comparison
delayed
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP9638182U
Other languages
English (en)
Japanese (ja)
Other versions
JPS58129551U (ja
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP9638182U priority Critical patent/JPS58129551U/ja
Publication of JPS58129551U publication Critical patent/JPS58129551U/ja
Application granted granted Critical
Publication of JPS625722Y2 publication Critical patent/JPS625722Y2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Tests Of Electronic Circuits (AREA)
JP9638182U 1982-06-25 1982-06-25 デイジタル比較回路 Granted JPS58129551U (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9638182U JPS58129551U (ja) 1982-06-25 1982-06-25 デイジタル比較回路

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9638182U JPS58129551U (ja) 1982-06-25 1982-06-25 デイジタル比較回路

Publications (2)

Publication Number Publication Date
JPS58129551U JPS58129551U (ja) 1983-09-01
JPS625722Y2 true JPS625722Y2 (en]) 1987-02-09

Family

ID=30101052

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9638182U Granted JPS58129551U (ja) 1982-06-25 1982-06-25 デイジタル比較回路

Country Status (1)

Country Link
JP (1) JPS58129551U (en])

Also Published As

Publication number Publication date
JPS58129551U (ja) 1983-09-01

Similar Documents

Publication Publication Date Title
US6366991B1 (en) Method and apparatus for coupling signals between two circuits operating in different clock domains
US6111814A (en) Synchronous DRAM memory with asynchronous column decode
US6194916B1 (en) Phase comparator circuit for high speed signals in delay locked loop circuit
US7843743B2 (en) Data output circuit for semiconductor memory apparatus
US6314536B1 (en) Memory testing apparatus
US7181638B2 (en) Method and apparatus for skewing data with respect to command on a DDR interface
JPH027530B2 (en])
US7466622B2 (en) Method for controlling time point for data output in synchronous memory device
KR20080005294A (ko) 라이브 측정으로 측정-초기화되는 지연 고정 루프
JPS625722Y2 (en])
US6100739A (en) Self-timed synchronous pulse generator with test mode
US7676643B2 (en) Data interface device for accessing memory
KR19980041606A (ko) 가변 억세스 타임을 보장하는 동기형 반도체 메모리 장치
JPH0133052B2 (en])
US7058911B2 (en) Measurement of timing skew between two digital signals
JP2936807B2 (ja) 集積回路
KR100976406B1 (ko) 플립플롭 및 그를 포함하는 반도체 메모리 장치
JP3506675B2 (ja) 半導体記憶装置
JP2818563B2 (ja) 同期式メモリ
KR100434492B1 (ko) 메모리를 제어하는 클럭 발생 장치를 구비하는 반도체메모리 장치 및 클럭 발생 방법
JPS5814989B2 (ja) ロジック素子あるいはロジック回路の動作速度試験回路
JP2786033B2 (ja) 時間測定装置
JPH04358397A (ja) 半導体記憶装置
KR19980058373A (ko) 반도체 메모리소자의 자동리프레쉬회로
JPS60205896A (ja) タイミング調整回路